Biography
Francesco Antognazza is a Ph.D. student working in the field of Post-Quantum Cryptography and efficient hardware designs at Politecnico di Milano. His research interests include digital systems design and verification, HW/SW co-design and Side-Channel Attacks.
Interests
- Digital Systems Design
- HW/SW co-design
- Cryptography
Education
M.Sc. in Computer Science and Engineering, 2020
Politecnico di Milano
B.Sc. in Computer Science and Engineering, 2017
Politecnico di Milano
Recent Publications
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(2024).
A Versatile and Unified HQC Hardware Accelerator.
Applied Cryptography and Network Security - 22nd International Conference, ACNS 2024, Abu Dhabi, United Arab Emirates, March 5-8, 2024, Proceedings.
(2024).
A High Efficiency Hardware Design for the Post-Quantum KEM HQC.
IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2024, Tysons Corner, VA, USA, May 6-9, 2024.
(2024).
Performance and Efficiency Exploration of Hardware Polynomial Multipliers for Post-Quantum Lattice-Based Cryptosystems.
SN Comput. Sci..
(2023).
A Flexible ASIC-Oriented Design for a Full NTRU Accelerator.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, ASPDAC 2023, Tokyo, Japan, January 16-19, 2023.
(2023).
An Efficient Unified Architecture for Polynomial Multiplications in Lattice-Based Cryptoschemes.
Proceedings of the 9th International Conference on Information Systems Security and Privacy, ICISSP 2023, Lisbon, Portugal, February 22-24, 2023.
Contact
- francesco.antognazza@polimi.it
- +39 02 2399 9047
- Via Giuseppe Ponzio, 34, Milano, 20133, Italy
- Enter Building 21 and take the stairs to Office 1B on Floor 2