Publications

(2024). A Versatile and Unified HQC Hardware Accelerator. Applied Cryptography and Network Security - 22nd International Conference, ACNS 2024, Abu Dhabi, United Arab Emirates, March 5-8, 2024, Proceedings.

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(2024). Performance and Efficiency Exploration of Hardware Polynomial Multipliers for Post-Quantum Lattice-Based Cryptosystems. SN Comput. Sci..

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(2024). A High Efficiency Hardware Design for the Post-Quantum KEM HQC. IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2024, Tysons Corner, VA, USA, May 6-9, 2024.

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(2023). An Efficient Unified Architecture for Polynomial Multiplications in Lattice-Based Cryptoschemes. Proceedings of the 9th International Conference on Information Systems Security and Privacy, ICISSP 2023, Lisbon, Portugal, February 22-24, 2023.

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(2023). A Flexible ASIC-Oriented Design for a Full NTRU Accelerator. Proceedings of the 28th Asia and South Pacific Design Automation Conference, ASPDAC 2023, Tokyo, Japan, January 16-19, 2023.

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(2021). Metis: An Integrated Morphing Engine CPU to Protect Against Side Channel Attacks. IEEE Access.

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